The thing is moving to asic resistance is possible but it would require huge amount of resources(modfiing zen,modifing securenodes,modifing pools) modifing nearly everyting related to zen. It is possible but it will push Supernodes and other zen projects behind by years.

This new miner is either an FPGA with on board RAM (quite likely) or a full blown ASIC with some kind of very fancy (and expensive) linked memory module.
If it's an FPGA we're dealing with, finding an algorithm that you couldn't just reprogram the FPGA to mine will be extremely difficult. If it's an ASIC, the task of creating some kind of incompatibility by modifying or switching algo's would obviously be considerably easier.

Problem is, we have no technical specs for the Z9 so we could potentially put a load of effort into something that would only take a few days to reconfigure the Z9 to mine...

So I think we should spend some time trying to figure out what we're actually up against before trying to formulate a plan.