The major pitfall of ASIC is staticness. Which means that the work it is designed for cannot be updated or changed after. So the new strategy for beeing asic resistant, if to often change POW algorithm. It's a cat and mouse game.
So when coin dev choose to change their pow algorithm, like Monero dev did, those expensive and efficient piece of hardware are becoming useless except for blocking door (or targeting minor CN coins for less profit).
The ASIC doesn't need to be completely static to beat alternative implementations using GPUs or FPGAs.
Reconfigurable cryptographic processors are now fairly well developed field. The market for them was initially for network cryptographic accelerators for IPsec and SSL. It all started sometime before the turn of the century.
Here's a sample from the open scientific literature:
https://www.sciencedirect.com/science/article/pii/S2090123217301170Optimization of a novel programmable data-flow crypto processor using NSGA-II algorithm
but many such accelerators are developed in secret by the network hardware vendors.
Personally, I suspect that many "ASIC-resistant" algorithms are doomed to fail their goal because their designers just don't understand digital design and think that every possible hardware device must be some version of von Neuman architecture from 1945. But even in next decade (1950-1959) there were other architectural concepts developed that lead to significantly more efficient implementations at a cost of being less generic.