Re: [ANN] Bitfury is looking for alpha-testers of first chips! FREE MONEY HERE!
Hello,
I'm looking for the detailed package specification. Is the QFN48 package conform to some JEDEC standard? If it is, can someone add the JEDEC code here?
Otherwise, has anybody a drawing of the package with dimensioning? I would like to know the following parameters:
- length, width and height of the overall package
- pitch
- nominal width and length of the 48 pins
- width and length of the bottom ground pad
Thank you very much,
Andreas
I'm looking for the detailed package specification. Is the QFN48 package conform to some JEDEC standard? If it is, can someone add the JEDEC code here?
Otherwise, has anybody a drawing of the package with dimensioning? I would like to know the following parameters:
- length, width and height of the overall package
- pitch
- nominal width and length of the 48 pins
- width and length of the bottom ground pad
Thank you very much,
Andreas
I think those two quotes will answer your questions:
Finally die dimensions chosen: 3.8x3.8mm
Package: QFN48
Performance: 3.3 GH/s _rated performance_, about 7 GH/s maximum
Power consumption: 1 W at _rated_ performance @ 0.6 V, 6 W _maximum_ performance @ 1.0 V.
Thermal characteristics of package: 2 K / W junction-to-pcb and 34 K / W junction-to-ambient.
Package: QFN48
Performance: 3.3 GH/s _rated performance_, about 7 GH/s maximum
Power consumption: 1 W at _rated_ performance @ 0.6 V, 6 W _maximum_ performance @ 1.0 V.
Thermal characteristics of package: 2 K / W junction-to-pcb and 34 K / W junction-to-ambient.
Someone can give me dimensions of thermal pad? And what material is used (copper?).
QFN48 7x7, 0.5P Copper Alloy and Plating
That document in the link has also all the physical dimensions, pads, etc.
The bitfury library in my project was based on that document. From what I can tell - it seems to be good
