FPGAs and ASICs are very closely ralated, and FPGAs are generally used to prototype ASICs.
FPGA data + 500k$ = ASIC
Good luck 4% guy

Wait Wait.
You guys are saying that with the FPGA and bitstream code OP has, someone with deep pockets can actually produce an ASIC from it?
I believe you need the low-level source code (behavioral logic, transistor-gate level) to make an ASIC out.
Or you would have to reverse engineer the bit-stream which would also require complete knowledge about entire FPGA layout and schematics?