FPGAs and ASICs are very closely ralated, and FPGAs are generally used to prototype ASICs.
FPGA data + 500k$ = ASIC
Good luck 4% guy
Good luck 4% guy
Wait Wait.
You guys are saying that with the FPGA and bitstream code OP has, someone with deep pockets can actually produce an ASIC from it?
They could make a structured asic which doesn't have the same level of performance / energy efficiency gains as a 'real' asic (cell / custom, etc). It would lower cost a bit depending on quantity and maybe 15-20% performance/efficiency improvement.