Post
Topic
Board Securities
Re: ASICMINER: Entering the Future of ASIC Mining by Inventing It
by
Vycid
on 22/11/2013, 21:45:32 UTC

No, that's not right. Tape-out only means the design is finished. The design is sent 'on tape' (now it would be emailed I guess) to the foundry to make the masks. I believe making masks takes several weeks, though someone with IC manufacturing experience (Vycid?) may correct me on this. Making the masks is a big ticket item; you have to book out the specialized photolithography equipment for weeks to have the mask built, one layer at a time.

So if AM hit their target on tape-out (January 20) they won't have masks until late February at the earliest. Sample chips early March, chips in volume late March at the earliest. Allowing for slippage here and there it's probably more realistic to say April for chips in volume.

It's good that friedcat gave us an update, but the news isn't that startling, in my opinion. In fact, I sold on the news.

This is a pretty sober analysis. Correct: there is a long lead time between tape out and chip delivery, especially at modern process nodes. The photomasks have not yet been made, although FC may already have paid for them.

photolithography

I believe at 28nm you cant use photolithography anymore. It should be e-beam lithography then.

You are wrong. These days we use immersion litho and double patterning, but e-beam is not cost effective for anything except samples and making the masks themselves.