P.S. I work for Xilinx, so I can't ethically build or sell my own FPGA miner. But I want to help! Xilinx users can message me for help or advice!
For those who want to keep their VHDL/verilog private, I can execute a Xilinx NDA if you are nervous.
Cool! So, ostensibly, you could lend me an XC7V2000T engineering sample, rrrright? You're a swell guy.
