The copper thickness can be selected: very good, we may need more than the 35µm default. The 8mil minimal via diameter is even better (though you get less current through a smaller via)! The 8mil line width and line spacing are a problem, though: I cannot get an 8mil wire between two pads of the FPGAs: the clearance is too small. This problem can be solved by using more vias and routing everything on the other layers, but is is less than ideal.

There are "special PCBs" on the pcbcart webpage, though: 4mil for both specs. And they offer much more copper! I wonder how much that costs?

The point I made about the clearance depends on which pad diameter you use. My library used 0.5mm pads, but I read somewhere that 0.4mm may be sufficient. Any insight?