SHA-256, by its very nature, cannot be optimized.(1) The Open Source FPGA Bitcoin Miner uses 75K Altera Logic Elements to perform a full Bitcoin hash per clock cycle. This translates to somewhere between 225K gates and 975K gates. You say you get ~4 Bitcoin hashes per clock cycle from 45K gates. This is massively incorrect on your part.
Yeah, agreed. Even though I have no experience with ASIC design whatsoever, it's pretty obvious that 45K gates isn't nearly enough even for just the adders of a 1 hash per cycle design, let alone the rest of the logic required.