With blind vias it'd be easier to put gnd on the 2nd layer and route the gnd pins down to that, it's not strictly necessary though. Can you finish routing up the rest of the board? It's pretty close to done. Look in the main folder.

We still need a clk source and MSP430 hooked up. I've freed up 1 layer of the board, so that should make things easier. We'd need the FPGA and MSP guys to come in now and offer some input on how best which IOs go where and the clock source.