And they probably wanted us to believe that this is the paper they used as inspiration:
http://www.ee.usyd.edu.au/people/philip.leong/UserFiles/File/papers/sha_fpl02.pdfProblem is that this paper is pretty old, and the hardware they mention is outdated. If other people in this forum with much more modern FPGAs couldn't come up with a feasible implementation, there is no way that this could be competitive. This paper was written before GPGPUs became common.
And I couldn't find a more modern version of this Pilchard module.