8/10 vs 128/130 has absolutely nothing to do with this. That is simply the encoding for DC Balancing/ensure there is a periodic bitflip on the transcievers so they can stay locked. It was changed in PCIe 3.0 due to improved transceivers and to lower overhead.
Also for everyone checking lspci - most GPUs now adays are designed for low-power idle. They run the link at x1 unless they are actually being used for transfer! Run a bandwidth heavy test or activity and run lspci, youll see LnkStatus kick up to 3.0 (8 Gbps)
We just spent weeks testing dozens of risers and slots on 3 dozen motherboards. I havent found a single riser that cant sustain PCIe 3.0 speeds. While monitoring PCIe for any errors. I have, however, found crap mining motherboards that have PCIe errors on their slots even with a x1 device plugged straight in. Ill take that actual testing over your anecdote.
Software (miner) and APIs: This is a Pre-Order for the hardware. The software will launch with the hardware shipping late August. Weve already asked devs to reach out for API and SDK information that will be available before launch. Developer boards havent even been sent out yet to other devs.
I must have some real shitty risers then, because they refuse to do 3.0 in any of my boards including normal non mining boards, not only on the chipset's pcie ports, but also the cpu's x16 port

And for the lspci and idle thing, if you get 2,5 GT/s that could be it yeah, But im getting the 5 GT/s. And its while mining eth so the bus is used.
And yes some chipsets have shitty pcie that will make errors with just a standard network card, and its not only on mining boards, ive seen it on normal b250 boards also.