Post
Topic
Board Development & Technical Discussion
Re: Modular FPGA Miner Hardware Design Development
by
Olaf.Mandel
on 07/08/2011, 08:44:25 UTC
[...]
I have a question about the PSU. What is the load on the 2.5 V rail? Aren't we going a little overkill with the 10A supply? Maybe we could save a little money and space by switching to the LMZ12002 or 12003 (2A and 3A, respectively). The package is slightly smaller, too.

Good question, the exact current can probably be given by TheSeven, as he compiled (some version of) the HDL code that runs on the FPGA and the tools can give a power estimate. He insists these numbers are highly unreliable, but they are still the best we have at the moment. That said, we can also look at the datasheet: the maximum current for VCCAUX should be 600mA per FPGA, but there is no power consumption specified for VCCIO. As we don't connect many io pins, my guess is that this is low (100mA, maybe). So a 2A switcher may be sufficient. But a guess is all it is! We have to build the prototype and measure the currents in each path.