Happy to hear that some of you already got the samples! Remember that these are from a pilot run of the IC packaging, our guys in China have done several further optimizations in the meantime like the glue and the wires used inside the IC, also we did tweak some parameters with the foundry for future wafers, so the chips are going to be definitely much better in production run (coming probably next week already) than these samples.

Sorry that I fail to be active here on the forum but we are heavily debugging this baby in our labs these last days (and nights). Here are some hints we've found out that you should be aware of:

1) Reset should be toggled for a relatively long time, at least one second!

2) We tested both with 12 MHz and 16 MHz reflock, zefir's excellent driver can easily be used to program relatively any refclock within the specs given in the datasheet.

3) Not a news but the chip is veeeeery sensitive to VDD ripples, try to keep them between 50-70 mV maximum.

4) Heat sink is needed both on top and on bottom side. As for the top, a small BGA heat sink should be enough, you can experiment and as long as you keep the surface temperature to < 50°C it shouldn't have problems.

5) Suggested level shifters to be used for interfacing to anything that hasn't 1.8V I/O is TI TXS0104

Anything else I'll try to address it here

Good luck!