Their chip is simply too slow compared to the competition which will cause them to run in to problems during deployment, problems such as physical space, power constraints, cooling issues, etc.
That might actually be opposite the truth. Going for too large a die concentrates your power supply and heat removal problems. Thus we could see boards built like Avalon modules with multiple ASICs on that require only air cooling. Given that Ken WAS going to build avalon clones before the avalon chips fell through, he has experience with this type of design. The watts per meter square may be low enough such that cheap, simple, reliable and well characterized thermal solutions are possible rather than expensive, exotic, failure prone bleeding edge ones. Expecting to remove 400W from a contiguous square inch of silicon is bordering on the insane, expecting to pull 100W out of four half inch squares is much more reasonable.