Found it ! Didn't read correctly the first time though.

Source: https://github.com/SChernykh/xmr-stak-cpu/blob/master/README.md

"On the other side, ASIC/FPGA which use external memory for scratchpad will get 4 times slower due to increased bandwidth usage. ASIC/FPGA which use on-chip memory for scratchpad will get ~15 times slower because of high latencies introduced with division and square root calculations: they just don't have enough on-chip memory to hide these latencies with many parallel Cryptonight calculations."