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Topic
Board Mining (Altcoins)
Re: AMD Memory Tweak - Read and modify memory timings on the fly - [Vega Friendly]
by
Remember remember the 5th of November
on 23/03/2019, 20:00:36 UTC
So I managed to get this working on Windows. Are the values correct for r9 380x?

https://imgur.com/a/hZ7btRa
No, R9 have different struct.

Are these readily available?
https://raw.githubusercontent.com/ddobreff/amdmeminfo/master/gmc.h
Quote
       ultostr16_8( uint32_swap2(*(uint32_t *)&mc_seq_wr_ctl_d0), pos );
        ultostr16_8( uint32_swap2(*(uint32_t *)&mc_seq_wr_ctl_d1), pos+8 );
        ultostr16_8( uint32_swap2(*(uint32_t *)&mc_seq_ras_timing), pos+16 );
        ultostr16_8( uint32_swap2(*(uint32_t *)&mc_seq_cas_timing), pos+24 );
        ultostr16_8( uint32_swap2(*(uint32_t *)&mc_seq_misc_timing), pos+32 );
        ultostr16_8( uint32_swap2(*(uint32_t *)&mc_seq_misc_timing2), pos+40 );
        ultostr16_8( uint32_swap2(*(uint32_t *)&mc_seq_pmg_timing), pos+48 );
        ultostr16_8( uint32_swap2(*(uint32_t *)&mc_seq_misc1), pos+56 );
        ultostr16_8( uint32_swap2(*(uint32_t *)&mc_seq_misc3), pos+64 );
        ultostr16_8( uint32_swap2(*(uint32_t *)&mc_seq_misc8), pos+72 );
        ultostr16_8( uint32_swap2(*(uint32_t *)&mc_arb_dram_timing), pos+80 );
        ultostr16_8( uint32_swap2(*(uint32_t *)&mc_arb_dram_timing2), pos+88 );
And this is their order.
Thanks!