Please, do elaborate, Syke. I'll admit, I don't know how it is impossible. I'm assuming you're talking about the constraints of design and expected performance improvements with a node size shrink?
Yes, that's the biggest issue. The shrink from 28nm to 20nm will give roughly a 25% improvement. If they tried to do 6 TH/s, it will be because they are using many more chips, and it would be expensive, and the power draw would be in the 5,000+ watt range. That's simply not going to work.