Update: 2-Chip Evaluation Board Reference Design published by Bitmine
I have been approached numerous times from designers asking for a A1 reference design. Today, Bitmine added their 2-chip eval board design to their
GitHub repository.
We used this board for initial verification - it runs with the provided cgminer driver as is over RPi's SPI interface.
Can you comment on the LTC3811, and more specifically the current draw of the A1 itself? The datasheet suggests 20A nominal, 30A peak current draw. The LTC3811 you guys call out on the reference design doesn't clearly state its maximum current output in the datasheet (
link), but it makes a couple general references to a 10A and/or 15A limit (buried in the text somewhere). How are you using it to power two chips? Are they just running at dramatically reduced performance, or do we not have to supply as much current as stated in the datasheet?