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Development & Technical Discussion
Re: Modular FPGA Miner Hardware Design Development
by
kjj
on
12/09/2011, 16:19:45 UTC
Quote from: newMeat1 on September 12, 2011, 04:12:54 PM
What's up with those squiggly traces, ngzhang? Never seen that before
Usually, those are used to equalize the lengths of lines used for high speed busses. Unequal lengths = unequal delays. Unequal delays =
