So ... i feel i must answer few questions:
1. THERE ARE ASICS/FPGA for X16rv2 already. And it is a fact. So the whole antiASIC fork is a joke.
FPGA's are here, yes - never the goal to stop them. ASICS, not here, but will be soon. And then RVN will go to V3 and, hopefully, that will be a better anti-asic solution. But that road map was discussed prior to V2 being released. V2 was needed as a short-term stop gap to kick ASICs off the chain while a better longer-term solution is developed.
So, nope, not a joke - still on track.