Someone has to sit down and write a completely new kangaroo.
Shouldn't we be looking at FPGAs by now?
I'm actually working on a little project to get me started with Verilog.
It is a simple xpoint-only bruteforcer for now. The design works fine, but I couldn't fit it on the target chip yet.
The main goal is to get to the level where I can create a HDL Kangaroo implementation.