My guess is that they just used the estimates from the synthesis tool. It would appear that they didn't even simulate the chip before racing to design the PCB. Pre-simulation power estimates are known to be wildly inaccurate. I would tend to believe their claim that they've been 10 years in this business, which means that there are a lot of opportunities in the FPGA design business for vendors capable of better-organized work-flow.

The time it took for them to develop the software drivers is another piece of circumstantial evidence that they didn't create the simulation testbench.