Happy New Year, everyone!
2011-12-29 08:57:05 | (FPGA0) Job data loaded
2011-12-29 08:57:07 | (FPGA1) Job data loaded
2011-12-29 08:57:09 | Long-poll: new block 00000ccbc11813e4
2011-12-29 08:57:12 | (FPGA0) Job data loaded
2011-12-29 08:57:12 | (FPGA1) Job data loaded
2011-12-29 08:57:19 | (FPGA0) Golden nonce found
2011-12-29 08:57:19 | (FPGA0) accepted e1b54ce8L
280.69 MH/s | 0: 8/0/0 0.0% | 1: 7/0/0 0.0% | 3m42s
looks good at slush's pool
I always get 'Long-poll: Value error!' followed shortly by a long poll connection string.
It seems to be working though (no stales or anything).
This is at ABCPool.co
Very strange... I'll run one against ABCPool myself and see if I can figure out why that is.
The other two available fpga bitcoin boards have an open design - I can reuse them for different purpose, re-program or sale them as fpga dev kits if I decide to stop mining with them.
I would at least like to generate my own bitstream with your board, will this be possible? Will you release the schematic?
Yes, you can certainly try your hand at developing a new bitstream, or develop different applications for the board. You just need to tell ISE the part and the clock pin. It's the Spartan 6 LX150, -3 speed grade, FG484 package. The clock pin is K20 and 2.5V. All communication including bitstream loading is done over JTAG, and handled by the FT232R over USB. If you want to bypass the FT232R, the JTAG pins for each FPGA are broken out to a pin header and labeled on the board. I think I'll write all this up in a separate document and post it on the website. Let me know if you think any other info would be helpful!