Leakage current is highly temperature dependent, and a good chunk of total power consumption for sub-45nm bulk CMOS processes.
Switching speed is inversely related to temperature -> you can reduce operating voltage to "compensate" the speed gain, thus reduce dynamic and static power some more.
So yes, improved cooling can lower power consumption by a noticeable amount; No clue how much it is at 28nm, but I wouldn't be surprised if it's > 10W for 70 vs. 40 °C on these.