Thanks, I am not spi usb programmer, Just want to help out, and keep you barking up the right tree 
Seems most industry devs already know most of this, It just hit the hobby level and I found it relevant to some of you guys diagnostic posts. AMT must also know this.
Seems all three have similar issues HF BA AMT. Would that boil down to Bitmine original design ?
1 SPI for each master slave.... Is correct way.
Seems most industry devs already know most of this, It just hit the hobby level and I found it relevant to some of you guys diagnostic posts. AMT must also know this.
Seems all three have similar issues HF BA AMT. Would that boil down to Bitmine original design ?
1 SPI for each master slave.... Is correct way.
Yes its a good point and most of have gone through that one, but in this we don't think it's the SPI. Zefir outlined this in his thread:
https://bitcointalk.org/index.php?topic=294235.0
The chip resets itself when:
A. when supply voltage is unstable,
B. chip gets too hot,
C. there is noise on SPI bus and communication gets messed up.
Once that happens, we have not found a way to get the chain back to life other then possibly issuing a HW reset which is covered in zefir's thread.