That might be a good thing, I'm playing with sharpened blunt objects.

I know you didn't ask but a twisted overview follows:

A JTAG port is a way of programming Field Programmable parts, testing same, and testing PCB designs.
The Altera Cyclone 4 FPGA on the KnC controller has one of theese.
There is an unpopulated place for the JTAG connector on the power input end of the PCB.

I'm poking around with that using a USB JTAG dongle thingy.
The BBB can also do what the dongle thingy does with a bit of code.
So far I have not looked at a Neptune controller FPGA with JTAG toy.
I have 2 Saturn that will become 1 Hoopiter.
This will leave me with a spare controller.

After I make backups of the Saturn filesystem I'll reflash it and have a spare Neptune controller.
Then I can experiment a bit more freely with lower downtime and slightly less risk.

So far every turn has required hours of research/reading to 'almost' get up to speed with the part, the tool and 'openocd' software.
I had hoped to use the precompiled software the part manufacturer supplies but it is picky about using THEIR $300 tool.
I'll have a $10 clone of that in a week or two.
For now I have a 'flexible' alternative that is not plug and play.
I'm in that rabbit hole still learning.

If this approach fails we can snoop the communications between controller and ASIC.
I figure if the FPGA can filter a request, another micro or FPGA could unfilter it.
We may need to do this anyways(snoop) to identify what in the FPGA needs changed.

I'd also guess there is some way to send a frequency command that is unfiltered.
This would resemble the early 28nm way of OC if it exists.

There is another approach someone can try.
Send a Very Very Very POLITE note to KnCMiner and ask if they would please bump up the speed a notch or two.

Plant a seed!

YMMV