A full custom ASIC at current gate lengths (28 nm, 35 nm, 40 nm, 45 nm) is now several million.
Ok so an ASIC seems to be out of the question as of now. But what about just an FPGA design?
The best hope now seems to be EldenTyrell, who has managed to fit three instances of SHA-256 (single SHA, not double SHA) into a Spartan6-150, however he wants to be compensated at market rates for his (admittedly brilliant) work, and thus it is unclear whether his bitstream will ever become publicly available.
Then there is wondermine, who certainly does not lack youthful exuberance and enthusiasm and maybe he can duplicate EldenTyrell's work and put it in the public domain.
If none of them comes through, it looks like we are stuck at 210 MH/s (Stefan == ZTEX).