Re: ASICMINER: Entering the Future of ASIC Mining by Inventing It
Thanks for the post Jutarul (and zefir).
When you say "gen4 is coming along according to schedule", can you shed any light regarding what that schedule is? What phase is the design of gen4 chips in? When is "tape out" expected? When are the first samples expected to be received by AM for testing?
As long as there is no clear guidance on information policy, I have to defer to FC in answering those questions. That said - I don't have the data you're asking for (other than the tape out date).When you say "gen4 is coming along according to schedule", can you shed any light regarding what that schedule is? What phase is the design of gen4 chips in? When is "tape out" expected? When are the first samples expected to be received by AM for testing?
Is that info allowed for public release?
I think he said fairly clearly that he has not received the go-ahead from FC to be able to release that information.
He also said very clearly that the had the gen 4 tape-out date.
