Meh! FC announced plans for 0.2 J/Gh back in January for gen 3.
Power Consumption: 0.2J/GHash low voltage, 0.35J/GHash rated voltage
Things don't always go according to plan though. The flaws were identified and fixed for gen 4 and given the die shrink, gen 4 should be able to go lower than 0.2J/Gh in a low power mode.
6) What is the progress on gen4?
It is 28nm and has two major improvements: the first one is to fix the design errors we had with 40nm (which made our silicon data two times worse than simulated data). We believe that 0.35W/G at rated speed of 400MHz would be achievable in 40nm if no mistakes were made before. The second one is the technology improvement from 40nm to 28nm in terms of density, speed and power.
We are on the stage of evaluating the final design choices by running the physical design flow on different settings.
So, if gen4 works as well as FC expects it shouldn't really have any problem competing with BitFury's new chips in terms of efficiency.