Quote from: la7eralus on August 07, 2014, 09:35:41 PM

I was able to seperate the above frequencies into smaller incremental steps, but I have no idea how to calculate the "reg. value" or the "ideal delay" for them. Anyone with a little more know-how than myself willing to help out? I know a few other people in this thread were looking for something like this as well, and any help at all would be appreciated. Thanks!

Adjusting the S1 formula based on S3 ASIC spec I was able to get following register values (and timeout). Use the settings below at your own risk!

Clock_Freq	Register value	Timeout
(chip_freq)	(freq_value)	(timeout)
100	0783	40
103.125	1007	39
106.25	0803	38
109.375	1107	37
112.5	0883	36
115.625	1207	35
118.75	0903	34
121.875	1307	33
125	0983	32
128.125	1407	31
131.25	0A03	30
134.375	1507	30
137.5	0A83	29
140.625	1607	28
143.75	0B03	28
146.875	1707	27
150	0B83	27
153.125	1807	26
156.25	0C03	26
159.375	1907	25
162.5	0C83	25
165.625	1A07	24
168.75	0D03	24
171.875	1B07	23
175	0D83	23
178.125	1C07	22
181.25	0E03	22
184.375	1D07	22
187.5	0E83	21
190.625	1E07	21
193.75	0F03	21
196.875	1F07	20
200	0782	20
206.25	1006	19
212.5	0802	19
218.75	1106	18
225	0882	18
231.25	1206	17
237.5	0902	17
243.75	1306	16
250	0982	16
256.25	1406	16
262.5	0A02	15
268.75	1506	15
275	0A82	15
281.25	1606	14
287.5	0B02	14
293.75	1706	14
300	0B82	13
306.25	1806	13
312.5	0C02	13
318.75	1906	13
325	0C82	12
331.25	1A06	12
337.5	0D02	12
343.75	1B06	12
350	0D82	11
356.25	1C06	11
362.5	0E02	11
368.75	1D06	11
375	0E82	11
381.25	1E06	10
387.5	0F02	10
393.75	1F06	10
400	0F82	10

JakeTri

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