Quote from: mrb on July 31, 2012, 05:40:53 AM

Quote from: Lethos on July 29, 2012, 04:45:21 PM

So If it was shrunk down to 45nm it would energy wise (optimal) result in a saving that result in about ~2 Watt chip, that does 1.25Gh/s.
Guess I wasn't that far off, when I estimated 1Gh/s for a single usb powered Chip based on a 45nm design. Still estimates, but at least an estimate I could believe.

More precisely, scaled to 45nm, Bit Erupter's chip would give 1.96 Ghash/s at 2.5 Watt.
This is 787 Mhash/sec and slightly better(!) than my prediction of 700 Mhash/sec for BFL's ASIC.

It would not be a good idea to run a chip at 2.5 watts, a bit below 2 watts is a lot wiser, when a usb slot variance can easily dip below 2.5 watts.
Also the chip alone is not the only thing which will be drawing power, you have to take that into account, hence why the design should be below 2watts.

Only reason why your prediction "fits" is because you just assumed they'll be using 2 usb ports to power it and also apparently going over the spec of those usb slots are capable of providing.