Quote from: Sub-Ether on June 02, 2015, 05:08:37 PM

Quote from: OrphanedGland on June 02, 2015, 11:32:41 AM

As this work was financed, all I can do is provide a sanitized screenshot. This is a simulation of the FPGA version of the design using a UART interface:

Also note that my design has a number of compile time parameters/constants which affect the performance/throughput. The above simulation is for a design with basic settings only and a nominal clock rate, so the time intervals shown do not reflect expected performance.

Thank you very much for your professional input (reminds me of my student days on the altera test boards, lol),
Am wishing you all the luck with your project and perhaps it will be brought to fruition one day in the future if the price goes way up and this becomes a viable project to manufacture and sell.
Small tiny last question please, am wondering roughly how many man hours or months of work it has taken to get this far?
(btw, 'beefdead' is a funny hex number, is kind of like 'boobless' in decimal)

ASIC X11 miner simulation for a FPGA

Well I started almost a year ago, litecoin took me about a month or so, the x11 hash functions about 6 months (maybe 2 weeks per module, some a bit less, some a bit more), and then a few months to do integration, handling multiple cores etc. I am still finishing off protocol to handle comms between SPI master (ie rPI) and a chain of chips.