And its the packaged chip size. The naked die could be many times smaller. I wonder what the rationale is for making such small chips? Small chips means higher yield, but on a mature process like this, yield  wouldnt be a serious issue for anything below 100mm2. Packaging, testing, assembly, cooling,   PCB costs etc would make this a bad trade off I would think.

Friedcat can you say how small the actual die is and why you designed it so small?