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Re: Butterfly Labs November Update (ASIC Chips are "flawed". Delays.)
by
MeSarah
on 29/11/2012, 03:28:57 UTC
We decided to add certain clock buffers to improve noise-resistance and possibly increase frequency even further.

Sense most comments are pessimistic let me try to be optimistic by asking a question..

Is it possible that BFL is pushing their upper clock limit from 1 GHz to 1.5 GHz or even 2 GHz to squash the competition?