Quote from: ymgve on December 28, 2012, 02:11:10 PM

Quote from: SLok on December 28, 2012, 02:06:55 PM

Quote from: Bogart on December 28, 2012, 03:08:07 AM

95 chips. That'd be 315.789473684211MH/s per.

Does this mean you need to put 95 of those chips in a single device to get the hash-rate that a bfl little single (30Gh/s) is supposed to give?

I don't see why this is a problem. As long as the cost and power consumption of the device is reasonable, who cares how many chips it has?

More chips means more PCB area, and more traces to route. How many pins do you suppose are used on those QFN-40 packages, and how many of them need a dedicated connection to the MCU per chip rather than being able to be chained together bus style?

Also consider that a 30GH/s device based on 130nm technology may consume as much as 200 watts. Depending on what voltage the chips run at, that can add up to quite a few amps that the power-bearing PCB traces will need to be capable of carrying every step of the way.

Cooling complexity will also increase with the chip count, more decoupling caps will be needed, etc.

Quote from: friedcat on August 09, 2012, 08:17:17 AM

Self-Mining with First Batch of Chips At least 12TH/s in
total, that is equivalent to 30MH/s per share, or 300MH/s per BTC.

So they're going to need 38,000 chips to reach their "first batch" hashrate of 12TH/s. Yowza.