Quote from: smooth on April 19, 2016, 10:33:46 PM

Quote from: AlexGR on April 19, 2016, 10:24:22 PM

I believe it's not only CPU miners that are at stake here. Even signatures could be validated 2-4 at a time, on the same subroutine, to get SIMD benefits. So scaling is affected as well. It would need the main routine to be adjusted accordingly instead of sending 1 for processing (per thread) to 2-4 (per thread) and expect back 2-4. Heck, even cracking speed could be improved.

Signatures should eventually be verified on GPUs (or similar SIMD units that get integrated into CPUs in time). That will happen when it is needed. CPU SIMD instructions are kind of interesting but also kind of narrowly-targeted. Processing large amounts of data in a fixed pipeline will still be more efficient on GPU-type architectures.

This is why only main memory random access latency bound proof-of-work algorithms can potentially remain GPU and ASIC resistant. And they must be carefully designed so that increased computation can not be realistically traded for latency. One of the challenges in such a design for a memory hard hash, is that very slow speed if you want the memory consumed to be larger than the SRAM caches of GPUs and ASICs. Ideally you want the computation to be very small, so that the electrical efficiency optimization of the ASIC won't be significant.