Quote from: NotFuzzyWarm on April 27, 2016, 12:16:25 AM

Quote from: 2112 on April 26, 2016, 11:40:31 PM

Quote from: HyperMega on April 26, 2016, 08:19:06 AM

Yes, but this is not much for a mining ASIC even in 22nm. I guess it should equate to about 10 ... 15 unrolled hash cores, because this 22nm GF node is only a 80% shrink of the GF 28nm node, not a true 50% shrink like other 20nm nodes. But therefore the 22nm masks cost only a little bit more than a 28nm mask set.

This is a perfect example of daft thinking of a CAD monkey. No sane hardware engineer would waste that valuable real estate (50 plots of 3 square millimeters each) to fill it out with identical unrolled cores and try to commercially mine with them. The sane engineer would fill those 3 sq.mm with as many different interesting designs as he/she could think of and then compare simulated results with actual results to gauge the accuracy of the toolchain. That is the whole point of prototyping.

I'd assume Hyper is talking about final real estate once some ideas have been tried and weeded through no?

Aside from that, as always seems you do bring up points we can agree on, in this case the necessity of doing more than just sims. Just ask BFL, Cointerra, Bitmine.ch as well as others how well that works (going straight from sims/FPGA work directly onto full silicon with pre-order promised delivered-by date(s)) on the horizon. Despite how the expense looks to accounting and the time required as always abhorrent to MArketing, the need to test ideas with physical silicon cannot be bypassed. Running an assload of smaller (and cheaper) dies gives a chance to test different cell layouts for several different functions to find best and most cost effective of breed to then start integrating together for proto-round-2.

Just like when using SPICE, one cannot always trust what the models say. It's the minutiae of real-world circuitry that never fails to surprise ya from time to time.

Don't worry, I don't take this personally. The more posts from 2112 I read, the more I get the feeling that he is probably a little bit too long out of the real world ASIC business and if he ever got to know it, then more from an academic point of view. By the way, he is not the only one who had strange experiences with Apache (now Ansys) tools and these are only niche tools, which you need for a very small part of the overall design flow (sorry for the CAD monkey terms Wink

).

You have of course to do a design exploration of different variants of hashing cores. And if you want a complete picture then you have to do it in different technologies. But I doubt that you have to tape-out all these variants to get to know, which one is the best and should be used in the final ASIC. If you are an experienced CAD monkey Wink

you can determine which of your variants is the best with high confidence without silicon, at least relatively to each other. Real silicon results will be +/- 15%, maybe +/- 20%, but not more, otherwise you missed something very important during the design phase.
And in any case, finally every working mining ASIC will be a layout based on a replicated highly optimized hashing core, because there is no other efficient way to implement so called multi/many core systems.

If I would do a prototyping run like discussed above (based on a MPW run), then I would try to get as close as possible to the final ASIC with respect to performance, die size and packaging concept to be able to pipe clean the complete miner system design including cooling setup, string regulation concept and so on. That does not exclude that you include different variants of hash cores in the prototype.

Anyway you should keep in mind, that the complete prototyping cycle AFTER you have finished the design will take at least 6 months including packaging, measurements and analysis. That is why almost everybody who has successfully brought a miner to market skipped this step.