Quote from: gmaxwell on January 28, 2013, 03:48:28 AM

Quote from: pcm81 on January 28, 2013, 03:00:28 AM

It's one thing to design processor application, and it is completely different task to actually design the processor. Something like radeon 6970 gpu has 2.6 billion transistors. For FPGAs like startan-6 we are still talking billions of transistors. For someone starting from scratch, can you imagine how long it would take to draw wiring schematic with a billion components? This is what you would have to do to design a brand spanking new custom ASIC. ASIC is Application Specific Integrated Circuit, so either you have to piece it together via FPGA conversion or you have to design this circuit from scratch. This task would be not easier than it was to design FPGA like SPARTAN-6 in the first place. We talking major dollars here.

I actually did a standard cell design for a miner last year myself, starting from RTL generated off one of the open source HDL designs. God knows if it would have actually run at an acceptable clock rate given that I don't really know what I'm doing... but it wasn't that much work to get _something_. A miner is insanely repetitive. The hash function is very simple. Thank god for design automation.

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1. SHA-256 capable devices require export license, and no export to China is permitted.

This is nonsense. In particular, ITAR regulations very specifically exclude authentication. I am now beginning to wonder if you aren't being purposefully dishonest instead of just confused.

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so the amount of work "gate flipping" that ASIC would need to do will be the same as it is for FPGA

Not so Go look at what a directly wired 32-bit adder looks like compared to what actually gets implemented in an FPGA (in particular all the power lost to running the sram). FPGAs also waste a lot of power running the long wires in the generic routing mesh and waste a lot of power in additional flip-flops needed to make it time out acceptably. All of these are avoided in a straighforward fixed design.

(I suppose I should note that the asic makers are claiming power efficiencies which are at the extreme upper envelope relative to their claimed processes of what I thought was possible from my designs, but I don't find this especially shocking as presumably they know what they're doing and I do not)

1. In regards to export license, see the link i provided above. SHA-256 requires export license to China. Let's say i am in outside of US fixing a broken tank. Lets say to fix it i need a light bulb from "the tourch" flashlight which is sold in US. I call my boss in US to have him buy the flashlight, take out the bulb and mail it to me. He has to add the bulb to export license, because i am going to use it to fix a tank. SHA-256 is used to encrypt data, just as it is used to authenticate a user. Export license for SHA256 core will be required, just like the export license would be required for the light bulb in example i gave. US does not allow export of cripo technology to china. You can not legally send SHA-256 cores to be assembled into a product in the Chinese factory. You can send an FPGA to china to be added to pcb and then, when it gets to US u can burn the FPGA into ASIC.