My impression was that ASIC designs are foundry-specific. How do you open-source that? Even if you published the Verilog, what good would it do?
ASIC designs are technology specific but not tied to any machine calibration. They should open source the functional verilog as well as the full mask and specification - a turn key design.
Dude,
Let us focus with simple things first.
They have announce that they will sell chips in bulk. If they publish the PCB designs (Asic Board+Controller +PDU + Components list), It will be more than enough. I do not se a reason why they shall not to do it as long this design is related with their chip. If They do that I am about to buy bulk chips and build my own units and most of us can do. I will bevery happy to do that personaly
What about that Ngzhang, Bitsync - I have mailed you a couple of times and no response still