Quote from: xbaby on May 10, 2013, 05:52:28 AM

the 300MHz result was just compiled with no timing error. in next few days, I'll program it on board to see if it could really run perfectly.

some update on the latest progress:

I must say the 300MHz result was achieved with no clock pin constrained. after bind the clock pin to real pin location (and I use a 25MHz crystal), It's very hard to meet above timing parameter. the best result I've achieved is 275MHz by now. a little bit strange.

And, to make my xc6vlx130t board actually work with a mining pool, I finished some hard work. the jtag_comm.v jtag / host communication code has some issue on Virtex6 BSCAN engine, and I've made a patch for it. currently, the board can work perfectly using the MPBM host software, with hash rate about 280MH/s, and about 11w wall power usage for 1 pcs lx130t FPGA chip.