Quote from: Kinetic915 on June 10, 2013, 02:39:03 PM

I'm still very dubious this will actually make any profit. At the current rate of difficulty increase (may was 74k low and june was 124k low) 32 chips, 9 g/hs would make generally nothing later in the year.... anyone else done the math?

I've modeled it several different ways. There is definitely a wall of ASIC powered miners coming online which is going to significantly increase the difficulty over the next several months: almost a year of BFL orders, Avalon batch 2 & 3 + chips, BitFury, KnC, and ASICMiner likely increasing their hash to maintain 20%+ of the hash pie.

The two critical question, IMO, are how quickly will all of the above be delivered and what happens to new ASIC miner demand after this first wave is fully delivered/deployed? Possible outcomes:

1) First wave of ASIC backlogs above is fully deployed very quickly (within 4 months) and new ASIC demand continues strong.
Result: unlikely to be profitable.

2) First wave of ASIC backlogs above is fully deployed very quickly (within 4 months) but new ASIC demand drops significantly because ROI isn't there.
Result: might eventually be profitable, but will take several months or year+.

3) First wave of ASIC backlogs above is fully deployed more slowly (6 to 9 months) and new ASIC demand continues strong.
Result: will break even or make a reasonable profit.

4) First wave of ASIC backlogs above is fully deployed more slowly (6 to 9 months) and new ASIC demand is muted because of increased difficulty.
Result: likely to be profitable to very profitable.

Of all the scenarios, I think #1 is least likely. The spike in difficulty we will be seeing over the next several months is because of back orders and pent-up demand for ASIC miners. Once that is deployed the rate of difficulty increase will trail off significantly... until 2nd generation ASIC miners start to come online (but I think that is a ways off and although 2nd generation miners will be much more efficient/cheaper, it is not the same type of increase as FPGA -> ASIC gen 1).