Quote from: titomane on July 22, 2013, 12:22:51 PM

Quote from: HyperMega on July 22, 2013, 11:21:01 AM

No offence here! Finally is just a question how they dice the wafers. Maybe it would be even wise, to have 4 dies 25 GH/s each in Multi-Chip-Package. But as you said, in sum they probably will have 100 GH/s per 120mm2.

Funny detail, the minimum count of wafers one can order at a foundry is 25 (1 lot)! Wink

It's really a good question, why invest another $1.5M - $2M for a new 28nm full mask set for gen 2 ASIC if you dominate the market with gen 1?

The hypothesis does not offend ever. Also if you are well explained, like yours so appreciated.

It is important to know ETA chips. It seems that the request was not made in June.

I rely on package change after the 26th June.
https://www.kncminer.com/news/news-22

They say 2046 Balls & now say 2797 Balls
Why and when they decided to change the number of pads?

I fully agree with you.

The tape-out date (sending the final layout to the fab, ordering the masks and wafers) is the major milestone of any ASIC design project. Every customer/investor should be informed about when this is planned and when it was finally executed (this is at least the case in the "normal" ASIC business world). Because after that the "train has left the station" and the time until wafers leave the fab is somehow predictable.

The layout was probably not final in June, otherwise it would not be possible to change the package later on.

If there is no tape-out in July it is impossible that KnC will have packaged dies in their hands end of September (not talking about delivering fully debugged miners to end customers).