Quote from: Minor Miner on August 01, 2013, 02:44:37 AM

Quote from: Anenome5 on August 01, 2013, 02:36:58 AM

Quote from: SirWizz on August 01, 2013, 12:53:57 AM

Quote from: Minor Miner on July 31, 2013, 11:58:39 PM

Not to nit pick, but how do you KNOW they have taped out. I do not know they have taped out. I have READ a post from KNC that they taped out but then again I read a post last November from Inaba saying that he had just sent a prototype to the lab for certification testing and we all (now) know that is not true.

That's actually a reasonable point. The truth is we can not be certain that they did tape out, but we estimate based on everything else that happened so far with this company and the backgrounds of the people involved that there is a high probability they are telling the truth. You might be inclined to weigh things differently, but your point is valid - until we see a video of a Jupiter hashing that is (how long KNC?

).

Imagine they've got chips ordered and PCBs ordered, I assume they'll receive sample chips early on and sample PCBs--perhaps it's not long before they'll have a couple Jupiters to work on in actuality. We know they promised a Jupiter to that couple doing the documentary on living on Bitcoin for a month was it, and they've probably got one for developing the software and whatnot. So, may not be long now before we see a working unit in actuality, before the others are put together even. Is that not so? Are they likely to receive sample chips or not?

You are getting closer to my point. If this is a complete design (and not something more akin to eASIC where you just design one layer), you would typically get on a shuttle (which would mean you would be saying "shuttle run is schedule and we should get sample chips to test and optimize our design in xx days). Then you would spend the $800,000 to tape out a 28nm mask......
who knows? That is what I am saying. we do not know. seems credible but who are the "competitors" that are scared if they know their progress? If I am producing ASICs it does not matter when these guys ship. It just changes the difficulty. It does not help my chips come quicker....

KnC clearly said, that they go directly to a full-mask tape out, no Mulit-Project-Wafer (MPW) run first.
For a die size of > 100 mm2 an MPW run would cost almost the same as an full-mask tape out, because there will be not much area left on the shared reticle for other customers projects (especially if the foundry uses a 4-in-1 Multi-Layer-Reticle for the MPWs).

$800k for a 28nm full-mask set? This is an amazing offer, at which foundry will I get it that cheap? Wink