Quote from: Puppet on September 20, 2013, 02:04:54 PM

Quote from: itod on September 20, 2013, 01:50:58 PM

how much are you gonna care for a few percent of bad units?

You dont. You know they will happen and it will be a non trivial percentage. Could be anywhere from 5 to 50% on a first run. But thats not the question. The question is if you want to discover all those bad chips before you spent time and money putting the defective chips in a fully populated PCB and assemble it to a functional testable miner, possibly with components that are harder to score than the asics (ask BFL) , or if you are going to do what is done with probably every other asic ever produced, test the dies and/or packaged chips before you waste those components, time and money.

You keep forgetting some facts:
- KNC are in different situation than any other ASIC ever produced. We've never seen 100% a month difficulty growth, and we may see much higher figures very soon.
- They don't have a facilities to do the chip-level resting in-house, only the board level testing.
- If they try to do chip-level testing for a whole batch #1 of their chips in China, it could take a week (or two).
- They don't have tested design yet. They may have a single problem in the design which can slow them down a week (or two) to solve.
Can they afford to loose some headroom for design changes gaining less faulty complete units?
Can they afford to reduce the worth of their chips 50% (two weeks late) to avoid some percentage of wasted complete units?
Can they afford the risk of mass refunds if they don't deliver before mid-october?