Post
Topic
Board Development & Technical Discussion
Re: Modular FPGA Miner Hardware Design Development
by
max3t
on 03/07/2011, 20:43:50 UTC
[...]In that case and optimistically assuming that the missing interface logic can be added to makomks code, the current table looks like this:[...]

I'm not quite sure, so eventually excuse me for wasting time. You filled in "109.29 MHash/s" although "Fmax=109.29MHz" was reported. (MHz instead of MHash/s). Or are they the same when fully unrolled?

Btw congrats makomk, your result sounds great Wink