Post
Topic
Board Development & Technical Discussion
Re: Modular FPGA Miner Hardware Design Development
by
makomk
on 03/07/2011, 21:32:18 UTC
I'm not quite sure, so eventually excuse me for wasting time. You filled in "109.29 MHash/s" although "Fmax=109.29MHz" was reported. (MHz instead of MHash/s). Or are they the same when fully unrolled?
The fully unrolled design does one hash per clock cycle, so yeah, they are the same.