Quote from: DeathAndTaxes on October 01, 2013, 12:22:42 AM

Quote from: DeathAndTaxes on September 04, 2013, 07:55:50 PM

Quote from: Ytterbium on September 04, 2013, 07:23:42 PM

Not exactly. The W/mm² issue has to do with the size of the physical chip, not the size of the packaging. There's only so much heat that can be removed from silicon for a given temperature gradient. For the packaging, you can use materials like copper or aluminum that have higher thermal conductivity then Silicon.

While the die size determines the heat transfer at the silicon junction, the size and more importantly type of package is also important as the thermal energy must pass through the package as well and the lower the thermal conductivity the higher the core die temp is going to reach. The bizarre thing is that they reported using "QFP packaging, 44 pin, no exposed heat pad" for the size of the die that makes absolutely no sense @ >12W and is still hard to believe even at 5W. They do make packages with exposed metal heat pad to improve heat transfer. For example this is the Avalon chip.

Inside the package the die is pressed against the large square metal pad in the center of the package. The center pad is only used for heat transfer, the other pins are used for electrical power, ground, and signal. The pad will be surface mounted to a non-electrical pad (copper plate) on the PCB to conduct heat away from this chip. Using a multi-layer board the connection can extend from the top layer through the PCB to the bottom layer which is used as a heat dump. As a side note this is why the heatsink is on the "back" of an Avalon board. The heat is conducted through the heatpad, through the PCB, to the heatsink on the other side. With a QFP and no heat pad essentially the entire chip is encapsulated in insulating plastic and that greatly limits the amount of power that can be dispersed.

I hate to say "I told you so" I never owned a share, never will I was just interested from a technology standpoint. There is a reason every other 110/130nm ASIC chip uses a heat heatpad package. If you put 12W in (and their 5W estimate was likely nonsense) you have to get 12W out. Plastic is a great thermal insulator. You aren't getting 12W out of a chip that small without something that has a higher thermal conductivity. They likely tried and with a low thermal conductivity the internal temp of the chip skyrocketed. Now they have a ton of chips which probably can't handle more than 2W which means running them at 10% speed (or slower).

You didn't tell me anything, I was aware of the problem with the packaging, I was responding to someone who thought the size of the packaging mattered, not the material. That's why I said For the packaging, you can use materials like copper or aluminum that have higher thermal conductivity then Silicon. - You're quoting me as if I was saying something completely different then what I actually said.

In fact, I responded at the time:

Quote from: Ytterbium on September 04, 2013, 08:43:29 PM

Quote from: DeathAndTaxes on September 04, 2013, 07:55:50 PM

Quote from: Ytterbium on September 04, 2013, 07:23:42 PM

Not exactly. The W/mm² issue has to do with the size of the physical chip, not the size of the packaging. There's only so much heat that can be removed from silicon for a given temperature gradient. For the packaging, you can use materials like copper or aluminum that have higher thermal conductivity then Silicon.

While the die size determines the heat transfer at the silicon junction, the size and more importantly type of package is also important as the thermal energy must pass through the package as well and the lower the thermal conductivity the higher the core die temp is going to reach.

Yeah, I was just pointing out the size of the packages is not the major determining factor. A "chip scale" flip chip BGA package would probably be tiny but still be able to remove a lot of heat (from what I understand)

Quote

The bizarre thing is that they reported using "QFP packaging, 44 pin, no exposed heat pad" for the size of the die that makes absolutely no sense @ >12W and is still hard to believe even at 5W. They do make packages with exposed metal heat pad to improve heat transfer. For example this is the Avalon chip.

It is strange. It would be helpful to have more information from them on why they decided to forgo the heat pad. Maybe they think the plastic will be able to dissipate the heat.

The thermal conductivity of plastic is about 0.2-0.5 W/mK, compared to 200 for aluminum.

But, remember the 'm' stands for the thickness of the material, not the surface area. If the package material is very thin, it can still conduct a decent amount of heat.

If you have a surface area of 1cm (0.0001m²), thermal conductivity of 0.5 W/mK, 50C temperature difference, and 0.25mm thick layer of plastic, you should be able to move

-(0.5W/mK) * 0.0001m² * (50K / 0.0025m)
=-0.5W/K*0.0001m*(20000K/m)
=-0.5W/K*0.0001*20000K
=-0.5W*0.0001*20000
=-1W.

So, just one watt of cooling using those parameters. Maybe 2 watts if you count both sides.

It's also possible that they could be using a type of plastic with a higher thermal conductivity as well.

And, it's also possible my math could be completely off. The units did cancel properly, but I could be doing that totally wrong Tongue

EDIT: A 12-inch wafer is 0.775mm thick, and a lqfp44 package is 1.2mm thick (not counting the pins). So the thickness of the packaging should be 0.21mm on either side. But there could be other materials in there as well. If so, that should increase the amount of heat able to be emitted package a great deal.

Anyway, we'll find out in a few days what's actually possible.

Great job misrepresenting what I actually said in order to say "I told you so"