Quote from: nonny12 on May 13, 2018, 09:16:45 AM

Quote from: senseless on May 12, 2018, 06:09:19 PM

Btw, did some reading on algebraic logic minimization last night along with a couple other techniques. This is already done, automatically, during synth (but can be turned off). Seeing the process, yes, it's something that could be added to simplify logic circuits. HOWEVER, Vivado already does it! Starting to question OP and if this bittware account is even really bittware. I might have to put my foot in my mouth in 18 days, but the more I look at it, the more I'm thinking it's not possible. Elaborate scam?

Using Logic Friday is also a valid approach, but I don't understand how that gets translated back into Vivado. Unless the coding is done at gate level, I don't know how it would be done. Logic Friday is also limited to 16 input and 16 output truth tables. The Espresso algorithm is also the correct logic reduction scheme. Logic Friday uses that algorithm for logic reduction. There is also C code for the algorithm that would not have truth table size restrictions.

Xilinx does not give their algorithm methods to the public. Maybe Synopsys would have some features I am not familiar with.

What does the OP gain by making this up? Only way I can think that they would profit is if they are getting a profit share of the hardware sales.

There are a couple of espresso minimizers i've found that would do 256 in / 256 out. One allowed VHDL output. Might be possible to just take an entire design that you like and starting at the one side go through and simplify the logic 256 ins / 256 outs at a time. (See you next tuesday) Learning how to do it by hand, it was very easy to see that a computer could iterate over the logic and reduce it much faster and to a more minimal level. There's a few pieces of K-Map software too.

I'm not sure he would need to do an entire design (as in the whole chip), only a single core, then iterate that core over multiple defined regions.

Synopsis has synplify, but it's not clear if it would be better or worse than vivado. I would think vivado would be able to better convert code into bits ideal for a 9P.