Quote from: gmaxwell on December 03, 2013, 09:27:49 PM

I dunno that fixating on the process node matters. KNC's product is a structured asic, just one step up from a FPGA hardcopy... and it shows it the power efficiency is half that being achieved in shipping products by others (bitfury, bitmain) on 55nm, and much lower than the 28nm products in preorder are claiming.

Although you're right about the power efficiency part, I'd say that for GH/s per m² will be in the favour of the 28nm process geometry, whatever shortcuts in design methodology are used. It's hard to see how you could design a chip layout that was only as space efficient as something twice the feature size.

But this will only make a difference to people that wish to pack hashing power into a datacenter, really. Hobbyists should still be thinking along the lines of "28nm of what?".